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MP2910 synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 1 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. the future of analog ic technology description the MP2910 is a dual output with one synchronous buck pwm and one linear controller. the part is used to generate logic- supply voltages for pc based systems. MP2910 includes internal soft-start, frequency- compensation networks, power good signaling with specific sequence, and it comes all of the logic control, output adjustment, power monitoring and protection functions into a small footprint package. the part is operated at fixed 300 khz frequency providing an optimum compromise between efficiency, external component size, and cost. the linear controller is implemented to drive an external mosfet for regulation and it's adjustable by setting external resistors. moreover the specific internal pg sequence and indicator is also implemented to conform to intel? new platform requirement on fsb_vtt power plane. an adjustable over- current protection (ocp) is proposed to monitor the voltage drop across the r ds(on) of the lower mosfet for synchronous buck pwm dc-dc controller. features ? operating with 5v or 12v supply voltage ? drives all low cost n-channel mosfets ? voltage mode pwm control ? 300khz fixed frequency oscillator ? fast transient response: high speed gm amplifier full 0 to 100% duty ratio ? internal soft-start ? adaptive non-overlapping gate driver ? over-current fault monitor on mosfet, no current sense resistor required ? specific power good indicator for intel? grantsdale fsb_vtt power sequence ? available in a soic-14 package and a soic8e package. applications ? graphic card ? motherboard, desktop servers ? ia equipments ? telecomm equipments ? high power dc-dc regulators ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc.
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 2 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical application
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 3 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. ordering information part number package top marking free air temperature (t a ) MP2910es* soic14 MP2910es ?20 ? c to +85 ? c MP2910en** soic8e MP2910en * for tape & reel, add suffix ?z (e.g. MP2910es?z); for rohs, compliant packaging, add suffix ?lf (e.g. mp MP2910es?lf?z). ** for tape & reel, add suffix ?z (e.g. MP2910en?z); for rohs, compliant packaging, add suffix ?lf (e.g. mp MP2910en?lf?z). package reference soic14 soic8e absolute maxi mum ratings (1) supply voltage v cc ...................................... 16v bst, v bst -v sw .............................................. 16v sw to gnd dc???????????????...-5 to 15v <200ns?????????????.-10 to 30v hg??????????v sw -0.3v to v bst +0.3v lg???????????..-0.3v to vcc+0.3v all other pins ................................. ?0.3v to +6v continuous power dissipation (t a = +25c) (2) soic14 ...................................................... 1.5w soic8e ...................................................... 2.6w junction temperature .............................. .150 ? c lead temperature .................................... 260 ? c storage temperature .............. ?65 ? c to +150 ? c recommended operating conditions (3) supply voltage v cc ................ 5v 5%,12 10% operating junct. temp (t j ) ..... ?20 ? c to +125 ? c ambient temperature range ..... ?20 ? c to +85 ? c thermal resistance (4) ja jc soic8e ................................... 48 ...... 10 ... ? c/w soic14 ................................... 86 ...... 38 ... ? c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max)=(t j (max)-t a )/ ja . exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circui try protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 4 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. electrical characteristics v cc = 5v/12v, t a = 25 ? c, unless otherwise noted. parameters symbol condition min typ max units supply current nominal supply current i cc ugate and lgate open 2.7 4 ma power-on reset por threshold v ccrth v cc rising 3.8 4.1 4.4 v hysteresis v cchys 0.15 0.4 v switcher reference reference voltage v ref v cc =12v 0.784 0.8 0.816 v oscillator free running frequency f osc v cc =12v 240 290 340 khz ramp amplitude v osc 1.5 v error amplifier ea transconductance gm 0.2 ms open loop dc gain a o 85 db linear regulator drv driver source i ds v drv =6v 2.3 ma reference voltage v ref v cc =12v 0.784 0.8 0.816 v pwm controller gate drivers (vcc=12v) upper gate source i hg v bst ? v sw = 12v v hg ? v sw = 6v 0.6 1 a upper gate sink r hg v bst ? v sw = 12v v hg ? v sw = 1v 4 6 ? lower gate source i lg v cc = 12v, v lg = 6v 0.6 1 a lower gate sink r lg v cc = 12v, v lg = 1v 2.8 3.8 ? dead time t dt 25 100 ns protection fb under-voltage trip fb falling 75 82.5 90 % fbl under-voltage trip fb and fbl falling 75 82.5 90 % oc current source i oc v sw = 0v 38 a soft-start interval t ss 2.5 ms power good power good rising threshold v cc =12v 90 % power good hysteresis v cc =12v 10 % pg sink capability v cc =12v, 1ma 0.02 0.4 v power good rising delay v cc =12v 1 4 10 ms power good falling delay v cc =12v 15 s
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 5 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. pin functions soic14 pin # soic8e pin # name description 1 1 bst bootstrap supply pin for the upper gate dr iver. connect the bootstrap capacitor between bst pin and the sw pin 2 2 hg upper gate driver output. conne ct to gate of the high side power n-mosfet. 3 3 gnd both signal and power ground for the ic 4 4 lg lower gate drive output. connect to gate of the low-side power n-mosfet 5 drv this pin provides the drive for the linear regulator's pass transistor/mosfet. 6, 7, 8 nc no internal connection 9 fbl linear regulator feedback voltage. 10 pg pg is an open-drain output used to indicate that the regulator is within normal operating voltage ranges 11 5 v cc connect this pin to a well-decoupled 5v or 12v bias supply. it is also the positive supply for the lower gate driver, lg. 12 6 fb switcher feedback voltage. this pin is the inverting input of the error amplifier. 13 7 ops this pin provides multi-function of the over-current setting, hg turn-on por sensing, and shut-down features. 14 8 sw connect this pin to the source of the upper mosfet and the drain of the lower mosfet.
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 6 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performanc e characteristics v in =12v, sv out =3.3v, l1=4.7 f, c 5 =1000 f, lvout=1.2v, t a =25c, unless otherwise noted.
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 7 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performanc e characteristics (continued) v in =12v, sv out =3.3v, l1=4.7 f, c 5 =1000 f, lvout=1.2v, t a =25c, unless otherwise noted.
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 8 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. typical performanc e characteristics (continued) v in =12v, sv out =3.3v, l1=4.7 f, c 5 =1000 f, lvout=1.2v, t a =25c, unless otherwise noted.
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 9 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. function block diagram figure 1 ? function block diagram timing diagram <1ms 90% vtt_gd 80% 1~10ms fsb_vtt(1.3v@5amp specific power sequence for ldo
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 10 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. operation the MP2910 is a 5v/12v synchronous buck pwm dc/dc and linear power controller. it adopts voltage mode pwm control and includes internal soft-start, frequency-compensation networks, power good signaling with specific sequence. the part is operated at fixed 300 khz frequency providing an optimum compromise between efficiency, external component size, and cost. the linear controller is implemented to drive an external mosfet for regulation and it's adjustable by setting external resistors. an adjustable over-current protection (ocp) is proposed to monitor the voltage drop across the r ds(on) of the lower mosfet for synchronous buck pwm dc-dc controller. vcc under-voltage lockout (uvlo) vcc under-voltage lockout (uvlo) is implemented to protect the chip from operating at insufficient supply voltage. the MP2910 uvlo?s rising threshold is about 4.1v with a hysteresis of 400mv. it?s not-latch protection. internal soft-start the soft-start is employed to prevent the converter output voltage from overshooting during startup. when the chip starts, the internal circuitry generates a soft-start voltage (ss) ramping up from 0v. when it is lower than the internal reference (ref), ss overrides ref so the error amplifier uses ss as the reference. the output voltage smoothly ramps up with the ss voltage. when ss is higher than ref, ref regains control. the circuit enters into steady stage operation. the ss time?s typical value is 2.5ms. power good indicator the pg pin is the open drain of a mosfet, it should be connected to supply power by a resistor network. when the fb voltage reaches 90% of ref voltage, the pg pin is pulled high after an about 4ms delay. when the fb voltage drops to 80% of ref voltage, the pg pin will be pulled low. internal loop compensation MP2910 is a voltage mode buck controller with internal loop compensation using a high gain transconductance error amplifier as shown in figure 2. figure 2 ? compensation loop with transconductance error amplifier the pole and zero of the compensation network are: p 12 1 f= 2 r c z 11 1 f= 2 r c MP2910 internal compensation network parameters: gm=0.2ms , 1 r=75k ? , 1 c =2.5nf , 2 c =5pf ops (over current setting, vin power on reset and shutdown) (pin 13) ocp (over current setting) MP2910 senses the low-side mosfet?s r ds(on) to set the over current trip point. connect an over current setting resistor r ocset from this pin to sw (pin 14), then the over current trip point can be estimated according to the following equation: ocset ocset ds(on) 38 ar -0.4v i r of the low-side mosfet ? ?
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 11 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. the over current trip point is very sensitive to external parasitic capacitance because the ops pin function is similar to rc charging/discharging circuit. when ocp is trigged, a hiccup restart sequence will be initialized and only 4 times of trigger are allowed to latch off (refer to ocp waveforms as shown in typical performance characteristics). vin_por (vin power on reset) before v in is ready, the hg pin will continuously generate a 10khz clock with 1% duty cycle. v in is recognized ready by sensing the voltage of ops pin crossing 1.5v four times (rising & falling). r ocset must be lower than 39.5k ? , otherwise, an internal 38 a current source flowing through r ocset will keep the voltage of ops pin always higher than 1.5v. if so, the vin_por function will be disabled. it is highly recommended that r ocset be lower than 30k ? . shutdown connect a small transistor from the ops pin to ground, then enabling the transistor can shutdown the MP2910 as shown in typical application circuit. uvp (under voltage protection) to protect against uv, the voltage of fb and fbl pins is monitored in MP2910. the uv threshold typical value is 82.5% of the fb or fbl rated value. once uvp_fbl is trigged, a hiccup restart sequence will be initialized and only 4 times of trigger are allowed to latch off. during soft-start interval hiccup is disabled. uvp_fb has some difference from ocp and uvp_fbl, it will always trigger v in power sensing even after 4 times hiccup. so the controller will restart when the voltage of fb pin recovers.
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 12 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. application information setting the output voltage the output voltage is set by using a resistive voltage divider from the output voltage to fb pin. first, choose a value for the feedback resistor r6, e.g. 10k ? , and then r5 is determined as follows: out ref 56 ref v-v r= r v ? selecting the inductor an inductor with a dc current rating of at least 25% higher than the maximum load current is recommended for most applications. a larger value inductor will result in less ripple current and lower output ripple voltage. however, the larger value inductor has a larger physical size, higher series resistance, and/or lower saturation current. generally, choose the inductor ripple current approximately 30% of the maximum load current, then the inductance value can be calculated by: out in out in l s v(v-v) l v if ? ? ?? where v out is the output voltage, v in is the input voltage, f s is the 300khz switching frequency, and l i is the peak-to-peak inductor ripple current. the maximum inductor peak current is: l l(max) load i i=i+ 2 where i load is the load current. input capacitor selection since the input capacitor absorbs the input switching current, it requires an adequate ripple current rating. the selection of input capacitor is mainly based on its maximum ripple current capability. the rms value of ripple current flowing through the input capacitor is described as: out out rms load in in vv i=i (1- ) vv the worst-case condition occurs at v in =2v out , where i rms =i load /2. so, the input capacitor you selected must be capable of handling this ripple current. output capacitor selection the output capacitor keeps output voltage ripple small and ensures regulation loop stability. the output capacitor impedance should be low at the switching frequency. the output voltage ripple can be estimated by: out out out esr sin so vv 1 v1r fl v 8fc ?? ?? ??? ? ? ?? ?? ??? ?? ?? where c o is the output capacitance value and r esr is the equivalent series resistance (esr) value of the output capacitor. for tantalum or electrolytic capacitor application, the esr dominates the impedance at the switching frequency. so the above formula can be approximated as: out out out esr sin vv v1r fl v ?? ??? ? ?? ? ?? pcb layout guide pcb layout is very important to achieve stable operation. a multi-layer pcb is highly recommended. the high current paths (gnd, v in and sw) should be placed very close to the device with short, direct and wide traces. a rc low pass filter is recommended for v cc supply. the v cc decoupling capacitor must be placed as close to v cc pin and gnd pin as possible. the external feedback resistors should be placed next to the fb and fbl pins. below pcb layout files are our test board for your reference:
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 13 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. top and top silk layers inner layer 1 inner layer 2 bottom layer figure 3 D MP2910ds pcb layout
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller MP2910 rev. 1.0 www.monolithicpower.com 14 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. package information soic14 0.016(0.41) 0.050(1.27) 0 o -8 o detail "a" 0.010(0.25) 0.020(0.50) x 45 o see detail "a" 0.0075(0.19) 0.0098(0.25) 0.150 (3.80) 0.157 (4.00) pin 1 id 0.050(1.27) bsc 0.013(0.33) 0.020(0.51) seating plane 0.004(0.10) 0.010(0.25) 0.338(8.55) 0.344(8.75) 0.053(1.35) 0.069(1.75) top view front view 0.228 (5.80) 0.244 (6.20) side view 1 7 14 8 recommended land pattern 0.213 (5.40) 0.063 (1.60) 0.050(1.27) 0.024(0.61) note: 1) control dimension is in inches. dimension in bracket is in millimeters. 2) package length does not include mold flash, protrusions or gate burrs. 3) package width does not include interlead flash or protrusions. 4) lead coplanarity (bot tom of leads after forming) shall be 0.004" inches max. 5) drawing conforms to jedec ms-012, variation ab. 6) drawing is not to scale. 0.010(0.25) bsc gauge plane
MP2910 ? 5v/12v synchronous buck pwm dc-dc and linear power controller notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP2910 rev. 1.0 www.monolithicpower.com 15 12/14/2011 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2011 mps. all rights reserved. soic8e (exposed pad)

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